NXP USA Inc. J113,126

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Description

Specification

Processor

Manufacturer	NXP USA Inc.
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Surface Mount	NO
Transistor Element Material	SILICON
Number of Elements	1
Operating Temperature	150°C TJ
Packaging	Tape & Box (TB)
Published	1997
JESD-609 Code	e3
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Mounting Type	Through Hole
Number of Terminations	3
ECCN Code	EAR99
Terminal Finish	Matte Tin (Sn)
HTS Code	8541.21.00.95
Terminal Position	BOTTOM
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Reach Compliance Code	unknown
Part Status	Obsolete
Base Part Number	J113
Drain-source On Resistance-Max	100Ohm
DS Breakdown Voltage-Min	40V
Qualification Status	Not Qualified
Configuration	SINGLE
Operating Mode	DEPLETION MODE
Power - Max	400mW
FET Type	N-Channel
Transistor Application	SWITCHING
Input Capacitance (Ciss) (Max) @ Vds	6pF @ 10V VGS
Pin Count	3
JESD-30 Code	O-PBCY-T3
FET Technology	JUNCTION
Power Dissipation-Max (Abs)	0.4W
Source Url Status Check Date	2013-06-14 00:00:00
Current - Drain (Idss) @ Vds (Vgs=0)	2mA @ 15V
Voltage - Cutoff (VGS off) @ Id	500mV @ 1μA
Voltage - Breakdown (V(BR)GSS)	40V
Resistance - RDS(On)	100Ohm
RoHS Status	ROHS3 Compliant

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