Toshiba 2SJ74BL

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Description

Specification

Processor

Manufacturer	Toshiba
Terminal Position	BOTTOM
Number of Terminals	3
Transistor Element Material	SILICON
Number of Elements	1
Package Shape	ROUND
JESD-609 Code	e0
Terminal Finish	TIN LEAD
Additional Feature	LOW NOISE
HTS Code	8541.21.00.95
Surface Mount	NO
Reach Compliance Code	unknown
Terminal Form	THROUGH-HOLE
Pin Count	3
JESD-30 Code	O-PBCY-T3
Qualification Status	Not Qualified
Configuration	SINGLE
Operating Mode	DEPLETION MODE
Transistor Application	AMPLIFIER
Polarity/Channel Type	P-CHANNEL
JEDEC-95 Code	TO-92
FET Technology	JUNCTION

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